
point-char:     file format elf64-littleaarch64


Disassembly of section .init:

00000000004004c0 <_init>:
  4004c0:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  4004c4:	910003fd 	mov	x29, sp
  4004c8:	94000034 	bl	400598 <call_weak_fn>
  4004cc:	a8c17bfd 	ldp	x29, x30, [sp], #16
  4004d0:	d65f03c0 	ret

Disassembly of section .plt:

00000000004004e0 <.plt>:
  4004e0:	a9bf7bf0 	stp	x16, x30, [sp, #-16]!
  4004e4:	b0000090 	adrp	x16, 411000 <__FRAME_END__+0x10064>
  4004e8:	f947fe11 	ldr	x17, [x16, #4088]
  4004ec:	913fe210 	add	x16, x16, #0xff8
  4004f0:	d61f0220 	br	x17
  4004f4:	d503201f 	nop
  4004f8:	d503201f 	nop
  4004fc:	d503201f 	nop

0000000000400500 <strlen@plt>:
  400500:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400504:	f9400211 	ldr	x17, [x16]
  400508:	91000210 	add	x16, x16, #0x0
  40050c:	d61f0220 	br	x17

0000000000400510 <__libc_start_main@plt>:
  400510:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400514:	f9400611 	ldr	x17, [x16, #8]
  400518:	91002210 	add	x16, x16, #0x8
  40051c:	d61f0220 	br	x17

0000000000400520 <__gmon_start__@plt>:
  400520:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400524:	f9400a11 	ldr	x17, [x16, #16]
  400528:	91004210 	add	x16, x16, #0x10
  40052c:	d61f0220 	br	x17

0000000000400530 <abort@plt>:
  400530:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400534:	f9400e11 	ldr	x17, [x16, #24]
  400538:	91006210 	add	x16, x16, #0x18
  40053c:	d61f0220 	br	x17

0000000000400540 <printf@plt>:
  400540:	d0000090 	adrp	x16, 412000 <strlen@GLIBC_2.17>
  400544:	f9401211 	ldr	x17, [x16, #32]
  400548:	91008210 	add	x16, x16, #0x20
  40054c:	d61f0220 	br	x17

Disassembly of section .text:

0000000000400550 <_start>:
  400550:	d280001d 	mov	x29, #0x0                   	// #0
  400554:	d280001e 	mov	x30, #0x0                   	// #0
  400558:	aa0003e5 	mov	x5, x0
  40055c:	f94003e1 	ldr	x1, [sp]
  400560:	910023e2 	add	x2, sp, #0x8
  400564:	910003e6 	mov	x6, sp
  400568:	580000c0 	ldr	x0, 400580 <_start+0x30>
  40056c:	580000e3 	ldr	x3, 400588 <_start+0x38>
  400570:	58000104 	ldr	x4, 400590 <_start+0x40>
  400574:	97ffffe7 	bl	400510 <__libc_start_main@plt>
  400578:	97ffffee 	bl	400530 <abort@plt>
  40057c:	00000000 	.inst	0x00000000 ; undefined
  400580:	00400ad4 	.word	0x00400ad4
  400584:	00000000 	.word	0x00000000
  400588:	00400bc0 	.word	0x00400bc0
  40058c:	00000000 	.word	0x00000000
  400590:	00400c40 	.word	0x00400c40
  400594:	00000000 	.word	0x00000000

0000000000400598 <call_weak_fn>:
  400598:	b0000080 	adrp	x0, 411000 <__FRAME_END__+0x10064>
  40059c:	f947f000 	ldr	x0, [x0, #4064]
  4005a0:	b4000040 	cbz	x0, 4005a8 <call_weak_fn+0x10>
  4005a4:	17ffffdf 	b	400520 <__gmon_start__@plt>
  4005a8:	d65f03c0 	ret
  4005ac:	00000000 	.inst	0x00000000 ; undefined

00000000004005b0 <deregister_tm_clones>:
  4005b0:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4005b4:	9100e000 	add	x0, x0, #0x38
  4005b8:	d0000081 	adrp	x1, 412000 <strlen@GLIBC_2.17>
  4005bc:	9100e021 	add	x1, x1, #0x38
  4005c0:	eb00003f 	cmp	x1, x0
  4005c4:	540000a0 	b.eq	4005d8 <deregister_tm_clones+0x28>  // b.none
  4005c8:	90000001 	adrp	x1, 400000 <_init-0x4c0>
  4005cc:	f9463021 	ldr	x1, [x1, #3168]
  4005d0:	b4000041 	cbz	x1, 4005d8 <deregister_tm_clones+0x28>
  4005d4:	d61f0020 	br	x1
  4005d8:	d65f03c0 	ret
  4005dc:	d503201f 	nop

00000000004005e0 <register_tm_clones>:
  4005e0:	d0000080 	adrp	x0, 412000 <strlen@GLIBC_2.17>
  4005e4:	9100e000 	add	x0, x0, #0x38
  4005e8:	d0000081 	adrp	x1, 412000 <strlen@GLIBC_2.17>
  4005ec:	9100e021 	add	x1, x1, #0x38
  4005f0:	cb000021 	sub	x1, x1, x0
  4005f4:	9343fc21 	asr	x1, x1, #3
  4005f8:	8b41fc21 	add	x1, x1, x1, lsr #63
  4005fc:	9341fc21 	asr	x1, x1, #1
  400600:	b40000a1 	cbz	x1, 400614 <register_tm_clones+0x34>
  400604:	90000002 	adrp	x2, 400000 <_init-0x4c0>
  400608:	f9463442 	ldr	x2, [x2, #3176]
  40060c:	b4000042 	cbz	x2, 400614 <register_tm_clones+0x34>
  400610:	d61f0040 	br	x2
  400614:	d65f03c0 	ret

0000000000400618 <__do_global_dtors_aux>:
  400618:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  40061c:	910003fd 	mov	x29, sp
  400620:	f9000bf3 	str	x19, [sp, #16]
  400624:	d0000093 	adrp	x19, 412000 <strlen@GLIBC_2.17>
  400628:	3940e260 	ldrb	w0, [x19, #56]
  40062c:	35000080 	cbnz	w0, 40063c <__do_global_dtors_aux+0x24>
  400630:	97ffffe0 	bl	4005b0 <deregister_tm_clones>
  400634:	52800020 	mov	w0, #0x1                   	// #1
  400638:	3900e260 	strb	w0, [x19, #56]
  40063c:	f9400bf3 	ldr	x19, [sp, #16]
  400640:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400644:	d65f03c0 	ret

0000000000400648 <frame_dummy>:
  400648:	17ffffe6 	b	4005e0 <register_tm_clones>

000000000040064c <xy_close_g_all>:
  40064c:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  400650:	910003fd 	mov	x29, sp
  400654:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400658:	91362001 	add	x1, x0, #0xd88
  40065c:	910063a0 	add	x0, x29, #0x18
  400660:	a9400c22 	ldp	x2, x3, [x1]
  400664:	a9000c02 	stp	x2, x3, [x0]
  400668:	a9410c22 	ldp	x2, x3, [x1, #16]
  40066c:	a9010c02 	stp	x2, x3, [x0, #16]
  400670:	a9420c22 	ldp	x2, x3, [x1, #32]
  400674:	a9020c02 	stp	x2, x3, [x0, #32]
  400678:	a9430821 	ldp	x1, x2, [x1, #48]
  40067c:	a9030801 	stp	x1, x2, [x0, #48]
  400680:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400684:	9131c000 	add	x0, x0, #0xc70
  400688:	d2800801 	mov	x1, #0x40                  	// #64
  40068c:	97ffffad 	bl	400540 <printf@plt>
  400690:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400694:	91322000 	add	x0, x0, #0xc88
  400698:	d2800101 	mov	x1, #0x8                   	// #8
  40069c:	97ffffa9 	bl	400540 <printf@plt>
  4006a0:	b9005fbf 	str	wzr, [x29, #92]
  4006a4:	1400000b 	b	4006d0 <xy_close_g_all+0x84>
  4006a8:	b9805fa0 	ldrsw	x0, [x29, #92]
  4006ac:	d37df000 	lsl	x0, x0, #3
  4006b0:	910063a1 	add	x1, x29, #0x18
  4006b4:	f8606821 	ldr	x1, [x1, x0]
  4006b8:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4006bc:	9132c000 	add	x0, x0, #0xcb0
  4006c0:	97ffffa0 	bl	400540 <printf@plt>
  4006c4:	b9405fa0 	ldr	w0, [x29, #92]
  4006c8:	11000400 	add	w0, w0, #0x1
  4006cc:	b9005fa0 	str	w0, [x29, #92]
  4006d0:	b9405fa0 	ldr	w0, [x29, #92]
  4006d4:	71001c1f 	cmp	w0, #0x7
  4006d8:	54fffe89 	b.ls	4006a8 <xy_close_g_all+0x5c>  // b.plast
  4006dc:	d503201f 	nop
  4006e0:	a8c67bfd 	ldp	x29, x30, [sp], #96
  4006e4:	d65f03c0 	ret

00000000004006e8 <xy_close_g_all_2>:
  4006e8:	a9ba7bfd 	stp	x29, x30, [sp, #-96]!
  4006ec:	910003fd 	mov	x29, sp
  4006f0:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4006f4:	91362001 	add	x1, x0, #0xd88
  4006f8:	910043a0 	add	x0, x29, #0x10
  4006fc:	a9400c22 	ldp	x2, x3, [x1]
  400700:	a9000c02 	stp	x2, x3, [x0]
  400704:	a9410c22 	ldp	x2, x3, [x1, #16]
  400708:	a9010c02 	stp	x2, x3, [x0, #16]
  40070c:	a9420c22 	ldp	x2, x3, [x1, #32]
  400710:	a9020c02 	stp	x2, x3, [x0, #32]
  400714:	a9430821 	ldp	x1, x2, [x1, #48]
  400718:	a9030801 	stp	x1, x2, [x0, #48]
  40071c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400720:	9131c000 	add	x0, x0, #0xc70
  400724:	d2800801 	mov	x1, #0x40                  	// #64
  400728:	97ffff86 	bl	400540 <printf@plt>
  40072c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400730:	91322000 	add	x0, x0, #0xc88
  400734:	d2800101 	mov	x1, #0x8                   	// #8
  400738:	97ffff82 	bl	400540 <printf@plt>
  40073c:	b9005fbf 	str	wzr, [x29, #92]
  400740:	1400000b 	b	40076c <xy_close_g_all_2+0x84>
  400744:	b9805fa0 	ldrsw	x0, [x29, #92]
  400748:	d37df000 	lsl	x0, x0, #3
  40074c:	910043a1 	add	x1, x29, #0x10
  400750:	f8606821 	ldr	x1, [x1, x0]
  400754:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400758:	91372000 	add	x0, x0, #0xdc8
  40075c:	97ffff79 	bl	400540 <printf@plt>
  400760:	b9405fa0 	ldr	w0, [x29, #92]
  400764:	11000400 	add	w0, w0, #0x1
  400768:	b9005fa0 	str	w0, [x29, #92]
  40076c:	b9405fa0 	ldr	w0, [x29, #92]
  400770:	71001c1f 	cmp	w0, #0x7
  400774:	54fffe8d 	b.le	400744 <xy_close_g_all_2+0x5c>
  400778:	910043a0 	add	x0, x29, #0x10
  40077c:	f9002ba0 	str	x0, [x29, #80]
  400780:	f9402ba0 	ldr	x0, [x29, #80]
  400784:	f9400001 	ldr	x1, [x0]
  400788:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  40078c:	91378000 	add	x0, x0, #0xde0
  400790:	97ffff6c 	bl	400540 <printf@plt>
  400794:	f9402ba0 	ldr	x0, [x29, #80]
  400798:	91002000 	add	x0, x0, #0x8
  40079c:	f9400001 	ldr	x1, [x0]
  4007a0:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4007a4:	91378000 	add	x0, x0, #0xde0
  4007a8:	97ffff66 	bl	400540 <printf@plt>
  4007ac:	b9005fbf 	str	wzr, [x29, #92]
  4007b0:	1400000c 	b	4007e0 <xy_close_g_all_2+0xf8>
  4007b4:	b9805fa0 	ldrsw	x0, [x29, #92]
  4007b8:	d37df000 	lsl	x0, x0, #3
  4007bc:	f9402ba1 	ldr	x1, [x29, #80]
  4007c0:	8b000020 	add	x0, x1, x0
  4007c4:	f9400001 	ldr	x1, [x0]
  4007c8:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4007cc:	9137c000 	add	x0, x0, #0xdf0
  4007d0:	97ffff5c 	bl	400540 <printf@plt>
  4007d4:	b9405fa0 	ldr	w0, [x29, #92]
  4007d8:	11000400 	add	w0, w0, #0x1
  4007dc:	b9005fa0 	str	w0, [x29, #92]
  4007e0:	b9405fa0 	ldr	w0, [x29, #92]
  4007e4:	71001c1f 	cmp	w0, #0x7
  4007e8:	54fffe69 	b.ls	4007b4 <xy_close_g_all_2+0xcc>  // b.plast
  4007ec:	d503201f 	nop
  4007f0:	a8c67bfd 	ldp	x29, x30, [sp], #96
  4007f4:	d65f03c0 	ret

00000000004007f8 <xy_close_g_all_3>:
  4007f8:	a9b97bfd 	stp	x29, x30, [sp, #-112]!
  4007fc:	910003fd 	mov	x29, sp
  400800:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400804:	913b4001 	add	x1, x0, #0xed0
  400808:	910063a0 	add	x0, x29, #0x18
  40080c:	a9400c22 	ldp	x2, x3, [x1]
  400810:	a9000c02 	stp	x2, x3, [x0]
  400814:	a9410c22 	ldp	x2, x3, [x1, #16]
  400818:	a9010c02 	stp	x2, x3, [x0, #16]
  40081c:	a9420c22 	ldp	x2, x3, [x1, #32]
  400820:	a9020c02 	stp	x2, x3, [x0, #32]
  400824:	a9430821 	ldp	x1, x2, [x1, #48]
  400828:	a9030801 	stp	x1, x2, [x0, #48]
  40082c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400830:	9131c000 	add	x0, x0, #0xc70
  400834:	d2800801 	mov	x1, #0x40                  	// #64
  400838:	97ffff42 	bl	400540 <printf@plt>
  40083c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400840:	91322000 	add	x0, x0, #0xc88
  400844:	d2800101 	mov	x1, #0x8                   	// #8
  400848:	97ffff3e 	bl	400540 <printf@plt>
  40084c:	910063a0 	add	x0, x29, #0x18
  400850:	f9002fa0 	str	x0, [x29, #88]
  400854:	b9006fbf 	str	wzr, [x29, #108]
  400858:	1400000c 	b	400888 <xy_close_g_all_3+0x90>
  40085c:	b9806fa0 	ldrsw	x0, [x29, #108]
  400860:	d37df000 	lsl	x0, x0, #3
  400864:	f9402fa1 	ldr	x1, [x29, #88]
  400868:	8b000020 	add	x0, x1, x0
  40086c:	f9400001 	ldr	x1, [x0]
  400870:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400874:	91386000 	add	x0, x0, #0xe18
  400878:	97ffff32 	bl	400540 <printf@plt>
  40087c:	b9406fa0 	ldr	w0, [x29, #108]
  400880:	11000400 	add	w0, w0, #0x1
  400884:	b9006fa0 	str	w0, [x29, #108]
  400888:	b9406fa0 	ldr	w0, [x29, #108]
  40088c:	71001c1f 	cmp	w0, #0x7
  400890:	54fffe69 	b.ls	40085c <xy_close_g_all_3+0x64>  // b.plast
  400894:	f9400fa0 	ldr	x0, [x29, #24]
  400898:	f90033a0 	str	x0, [x29, #96]
  40089c:	b9006fbf 	str	wzr, [x29, #108]
  4008a0:	1400000a 	b	4008c8 <xy_close_g_all_3+0xd0>
  4008a4:	b9806fa0 	ldrsw	x0, [x29, #108]
  4008a8:	f94033a1 	ldr	x1, [x29, #96]
  4008ac:	8b000021 	add	x1, x1, x0
  4008b0:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4008b4:	9138c000 	add	x0, x0, #0xe30
  4008b8:	97ffff22 	bl	400540 <printf@plt>
  4008bc:	b9406fa0 	ldr	w0, [x29, #108]
  4008c0:	11000400 	add	w0, w0, #0x1
  4008c4:	b9006fa0 	str	w0, [x29, #108]
  4008c8:	b9406fa0 	ldr	w0, [x29, #108]
  4008cc:	71001c1f 	cmp	w0, #0x7
  4008d0:	54fffea9 	b.ls	4008a4 <xy_close_g_all_3+0xac>  // b.plast
  4008d4:	f9400fa0 	ldr	x0, [x29, #24]
  4008d8:	f90033a0 	str	x0, [x29, #96]
  4008dc:	b9006fbf 	str	wzr, [x29, #108]
  4008e0:	1400000f 	b	40091c <xy_close_g_all_3+0x124>
  4008e4:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4008e8:	91396000 	add	x0, x0, #0xe58
  4008ec:	f94033a1 	ldr	x1, [x29, #96]
  4008f0:	97ffff14 	bl	400540 <printf@plt>
  4008f4:	b9406fa0 	ldr	w0, [x29, #108]
  4008f8:	11000400 	add	w0, w0, #0x1
  4008fc:	93407c00 	sxtw	x0, w0
  400900:	d37df000 	lsl	x0, x0, #3
  400904:	910063a1 	add	x1, x29, #0x18
  400908:	f8606820 	ldr	x0, [x1, x0]
  40090c:	f90033a0 	str	x0, [x29, #96]
  400910:	b9406fa0 	ldr	w0, [x29, #108]
  400914:	11000400 	add	w0, w0, #0x1
  400918:	b9006fa0 	str	w0, [x29, #108]
  40091c:	b9406fa0 	ldr	w0, [x29, #108]
  400920:	71001c1f 	cmp	w0, #0x7
  400924:	54fffe09 	b.ls	4008e4 <xy_close_g_all_3+0xec>  // b.plast
  400928:	f9400fa0 	ldr	x0, [x29, #24]
  40092c:	f90033a0 	str	x0, [x29, #96]
  400930:	b9006fbf 	str	wzr, [x29, #108]
  400934:	1400000f 	b	400970 <xy_close_g_all_3+0x178>
  400938:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  40093c:	913a0000 	add	x0, x0, #0xe80
  400940:	f94033a1 	ldr	x1, [x29, #96]
  400944:	97fffeff 	bl	400540 <printf@plt>
  400948:	b9406fa0 	ldr	w0, [x29, #108]
  40094c:	11000400 	add	w0, w0, #0x1
  400950:	93407c00 	sxtw	x0, w0
  400954:	d37df000 	lsl	x0, x0, #3
  400958:	910063a1 	add	x1, x29, #0x18
  40095c:	f8606820 	ldr	x0, [x1, x0]
  400960:	f90033a0 	str	x0, [x29, #96]
  400964:	b9406fa0 	ldr	w0, [x29, #108]
  400968:	11000400 	add	w0, w0, #0x1
  40096c:	b9006fa0 	str	w0, [x29, #108]
  400970:	b9406fa0 	ldr	w0, [x29, #108]
  400974:	71001c1f 	cmp	w0, #0x7
  400978:	54fffe09 	b.ls	400938 <xy_close_g_all_3+0x140>  // b.plast
  40097c:	910063a0 	add	x0, x29, #0x18
  400980:	f90033a0 	str	x0, [x29, #96]
  400984:	b9006fbf 	str	wzr, [x29, #108]
  400988:	1400000f 	b	4009c4 <xy_close_g_all_3+0x1cc>
  40098c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400990:	913aa000 	add	x0, x0, #0xea8
  400994:	f94033a1 	ldr	x1, [x29, #96]
  400998:	97fffeea 	bl	400540 <printf@plt>
  40099c:	b9406fa0 	ldr	w0, [x29, #108]
  4009a0:	11000400 	add	w0, w0, #0x1
  4009a4:	93407c00 	sxtw	x0, w0
  4009a8:	d37df000 	lsl	x0, x0, #3
  4009ac:	910063a1 	add	x1, x29, #0x18
  4009b0:	f8606820 	ldr	x0, [x1, x0]
  4009b4:	f90033a0 	str	x0, [x29, #96]
  4009b8:	b9406fa0 	ldr	w0, [x29, #108]
  4009bc:	11000400 	add	w0, w0, #0x1
  4009c0:	b9006fa0 	str	w0, [x29, #108]
  4009c4:	b9406fa0 	ldr	w0, [x29, #108]
  4009c8:	71001c1f 	cmp	w0, #0x7
  4009cc:	54fffe09 	b.ls	40098c <xy_close_g_all_3+0x194>  // b.plast
  4009d0:	d503201f 	nop
  4009d4:	a8c77bfd 	ldp	x29, x30, [sp], #112
  4009d8:	d65f03c0 	ret

00000000004009dc <test>:
  4009dc:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  4009e0:	910003fd 	mov	x29, sp
  4009e4:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4009e8:	913c4000 	add	x0, x0, #0xf10
  4009ec:	d2800201 	mov	x1, #0x10                  	// #16
  4009f0:	97fffed4 	bl	400540 <printf@plt>
  4009f4:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  4009f8:	913c8000 	add	x0, x0, #0xf20
  4009fc:	d2800101 	mov	x1, #0x8                   	// #8
  400a00:	97fffed0 	bl	400540 <printf@plt>
  400a04:	d503201f 	nop
  400a08:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400a0c:	d65f03c0 	ret

0000000000400a10 <f>:
  400a10:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400a14:	910003fd 	mov	x29, sp
  400a18:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400a1c:	913d0000 	add	x0, x0, #0xf40
  400a20:	910043a2 	add	x2, x29, #0x10
  400a24:	aa0003e3 	mov	x3, x0
  400a28:	a9400460 	ldp	x0, x1, [x3]
  400a2c:	a9000440 	stp	x0, x1, [x2]
  400a30:	f9400860 	ldr	x0, [x3, #16]
  400a34:	f9000840 	str	x0, [x2, #16]
  400a38:	b94013a0 	ldr	w0, [x29, #16]
  400a3c:	b9002fa0 	str	w0, [x29, #44]
  400a40:	910043a0 	add	x0, x29, #0x10
  400a44:	f9001fa0 	str	x0, [x29, #56]
  400a48:	14000017 	b	400aa4 <f+0x94>
  400a4c:	f9401fa0 	ldr	x0, [x29, #56]
  400a50:	f9001ba0 	str	x0, [x29, #48]
  400a54:	1400000c 	b	400a84 <f+0x74>
  400a58:	f9401ba0 	ldr	x0, [x29, #48]
  400a5c:	b9400000 	ldr	w0, [x0]
  400a60:	b9402fa1 	ldr	w1, [x29, #44]
  400a64:	6b00003f 	cmp	w1, w0
  400a68:	5400008a 	b.ge	400a78 <f+0x68>  // b.tcont
  400a6c:	f9401ba0 	ldr	x0, [x29, #48]
  400a70:	b9400000 	ldr	w0, [x0]
  400a74:	b9002fa0 	str	w0, [x29, #44]
  400a78:	f9401ba0 	ldr	x0, [x29, #48]
  400a7c:	91001000 	add	x0, x0, #0x4
  400a80:	f9001ba0 	str	x0, [x29, #48]
  400a84:	f9401ba1 	ldr	x1, [x29, #48]
  400a88:	f9401fa0 	ldr	x0, [x29, #56]
  400a8c:	cb000020 	sub	x0, x1, x0
  400a90:	f100201f 	cmp	x0, #0x8
  400a94:	54fffe2d 	b.le	400a58 <f+0x48>
  400a98:	f9401fa0 	ldr	x0, [x29, #56]
  400a9c:	91003000 	add	x0, x0, #0xc
  400aa0:	f9001fa0 	str	x0, [x29, #56]
  400aa4:	f9401fa1 	ldr	x1, [x29, #56]
  400aa8:	910043a0 	add	x0, x29, #0x10
  400aac:	cb000020 	sub	x0, x1, x0
  400ab0:	f100301f 	cmp	x0, #0xc
  400ab4:	54fffccd 	b.le	400a4c <f+0x3c>
  400ab8:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400abc:	913cc000 	add	x0, x0, #0xf30
  400ac0:	b9402fa1 	ldr	w1, [x29, #44]
  400ac4:	97fffe9f 	bl	400540 <printf@plt>
  400ac8:	d503201f 	nop
  400acc:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400ad0:	d65f03c0 	ret

0000000000400ad4 <main>:
  400ad4:	a9be7bfd 	stp	x29, x30, [sp, #-32]!
  400ad8:	910003fd 	mov	x29, sp
  400adc:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400ae0:	913d6000 	add	x0, x0, #0xf58
  400ae4:	f9000fa0 	str	x0, [x29, #24]
  400ae8:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400aec:	913da000 	add	x0, x0, #0xf68
  400af0:	d2800102 	mov	x2, #0x8                   	// #8
  400af4:	f9400fa1 	ldr	x1, [x29, #24]
  400af8:	97fffe92 	bl	400540 <printf@plt>
  400afc:	f9400fa0 	ldr	x0, [x29, #24]
  400b00:	97fffe80 	bl	400500 <strlen@plt>
  400b04:	aa0003e1 	mov	x1, x0
  400b08:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b0c:	913da000 	add	x0, x0, #0xf68
  400b10:	aa0103e2 	mov	x2, x1
  400b14:	f9400fa1 	ldr	x1, [x29, #24]
  400b18:	97fffe8a 	bl	400540 <printf@plt>
  400b1c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b20:	913e0000 	add	x0, x0, #0xf80
  400b24:	f9000fa0 	str	x0, [x29, #24]
  400b28:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b2c:	913da000 	add	x0, x0, #0xf68
  400b30:	d2800102 	mov	x2, #0x8                   	// #8
  400b34:	f9400fa1 	ldr	x1, [x29, #24]
  400b38:	97fffe82 	bl	400540 <printf@plt>
  400b3c:	f9400fa0 	ldr	x0, [x29, #24]
  400b40:	97fffe70 	bl	400500 <strlen@plt>
  400b44:	aa0003e1 	mov	x1, x0
  400b48:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b4c:	913da000 	add	x0, x0, #0xf68
  400b50:	aa0103e2 	mov	x2, x1
  400b54:	f9400fa1 	ldr	x1, [x29, #24]
  400b58:	97fffe7a 	bl	400540 <printf@plt>
  400b5c:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b60:	913e4000 	add	x0, x0, #0xf90
  400b64:	f9000fa0 	str	x0, [x29, #24]
  400b68:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b6c:	913da000 	add	x0, x0, #0xf68
  400b70:	d2800102 	mov	x2, #0x8                   	// #8
  400b74:	f9400fa1 	ldr	x1, [x29, #24]
  400b78:	97fffe72 	bl	400540 <printf@plt>
  400b7c:	f9400fa0 	ldr	x0, [x29, #24]
  400b80:	97fffe60 	bl	400500 <strlen@plt>
  400b84:	aa0003e1 	mov	x1, x0
  400b88:	90000000 	adrp	x0, 400000 <_init-0x4c0>
  400b8c:	913da000 	add	x0, x0, #0xf68
  400b90:	aa0103e2 	mov	x2, x1
  400b94:	f9400fa1 	ldr	x1, [x29, #24]
  400b98:	97fffe6a 	bl	400540 <printf@plt>
  400b9c:	97fffeac 	bl	40064c <xy_close_g_all>
  400ba0:	97fffed2 	bl	4006e8 <xy_close_g_all_2>
  400ba4:	97ffff15 	bl	4007f8 <xy_close_g_all_3>
  400ba8:	97ffff9a 	bl	400a10 <f>
  400bac:	97ffff8c 	bl	4009dc <test>
  400bb0:	d503201f 	nop
  400bb4:	a8c27bfd 	ldp	x29, x30, [sp], #32
  400bb8:	d65f03c0 	ret
  400bbc:	00000000 	.inst	0x00000000 ; undefined

0000000000400bc0 <__libc_csu_init>:
  400bc0:	a9bc7bfd 	stp	x29, x30, [sp, #-64]!
  400bc4:	910003fd 	mov	x29, sp
  400bc8:	a901d7f4 	stp	x20, x21, [sp, #24]
  400bcc:	b0000094 	adrp	x20, 411000 <__FRAME_END__+0x10064>
  400bd0:	b0000095 	adrp	x21, 411000 <__FRAME_END__+0x10064>
  400bd4:	91374294 	add	x20, x20, #0xdd0
  400bd8:	913722b5 	add	x21, x21, #0xdc8
  400bdc:	a902dff6 	stp	x22, x23, [sp, #40]
  400be0:	cb150294 	sub	x20, x20, x21
  400be4:	f9001ff8 	str	x24, [sp, #56]
  400be8:	2a0003f6 	mov	w22, w0
  400bec:	aa0103f7 	mov	x23, x1
  400bf0:	9343fe94 	asr	x20, x20, #3
  400bf4:	aa0203f8 	mov	x24, x2
  400bf8:	97fffe32 	bl	4004c0 <_init>
  400bfc:	b4000194 	cbz	x20, 400c2c <__libc_csu_init+0x6c>
  400c00:	f9000bb3 	str	x19, [x29, #16]
  400c04:	d2800013 	mov	x19, #0x0                   	// #0
  400c08:	f8737aa3 	ldr	x3, [x21, x19, lsl #3]
  400c0c:	aa1803e2 	mov	x2, x24
  400c10:	aa1703e1 	mov	x1, x23
  400c14:	2a1603e0 	mov	w0, w22
  400c18:	91000673 	add	x19, x19, #0x1
  400c1c:	d63f0060 	blr	x3
  400c20:	eb13029f 	cmp	x20, x19
  400c24:	54ffff21 	b.ne	400c08 <__libc_csu_init+0x48>  // b.any
  400c28:	f9400bb3 	ldr	x19, [x29, #16]
  400c2c:	a941d7f4 	ldp	x20, x21, [sp, #24]
  400c30:	a942dff6 	ldp	x22, x23, [sp, #40]
  400c34:	f9401ff8 	ldr	x24, [sp, #56]
  400c38:	a8c47bfd 	ldp	x29, x30, [sp], #64
  400c3c:	d65f03c0 	ret

0000000000400c40 <__libc_csu_fini>:
  400c40:	d65f03c0 	ret

Disassembly of section .fini:

0000000000400c44 <_fini>:
  400c44:	a9bf7bfd 	stp	x29, x30, [sp, #-16]!
  400c48:	910003fd 	mov	x29, sp
  400c4c:	a8c17bfd 	ldp	x29, x30, [sp], #16
  400c50:	d65f03c0 	ret
